Linux - Is there any way to identify the speed of your memory through software?

dmidecode is the tool you're looking for.

On my Debian, lshw give me that information.

# lshw -version
B.02.13
# lshw -short -C memory
H/W path             Device     Class       Description
=======================================================
/0/1                            memory      128KiB BIOS
/0/5/6                          memory      20KiB L1 cache
/0/5/7                          memory      1MiB L2 cache
/0/27                           memory      System Memory
/0/27/0                         memory      256MiB DIMM DDR Synchronous 400 MHz (2.5 ns)
/0/27/1                         memory      256MiB DIMM DDR Synchronous 400 MHz (2.5 ns)
/0/27/2                         memory      256MiB DIMM DDR Synchronous 266 MHz (3.8 ns)
/0/27/3                         memory      256MiB DIMM DDR Synchronous 400 MHz (2.5 ns)
/0/28                           memory      Flash Memory
/0/28/0                         memory      512KiB Chip FLASH Non-volatile
/0/0                            memory      
/0/2                            memory      

If you really want to benchmark the speed of the memory, you can't do it in a 32bit processor 386 protected mode since the page faults and the layout of the pagetables will weight a lot in the results.

Your best bet is coding the benchmark in 16bit "real mode" where you have direct access to the memory physical addresses.

For a nice bootup code that can be easily customizable, check the GRUB bootloader stage1 source. stage1 is the MBR that resides in the first 512 bytes of your hard disk. You'll find it in the source directory stage1/stage1.S file; it's heavily commented and easily understandable.

Once you have the MBR customized to your needs, compile it using the following method:

$ BOOT=mbr
$ gcc -O2 -fno-builtin -nostdinc -falign-jumps=1 -falign-loops=1 -falign-functions=1 -Wundef -g -c $BOOT.S
$ gcc  -g  -nostdlib -Wl,-N,-Ttext,7C00 -o $BOOT.exec  $BOOT.o  
$ objcopy -O binary $BOOT.exec $BOOT

Now you have an x86 MBR ready. It's desirable to test your code on a virtual machine like Qemu or Bochs before running it on the real machine; it will also ease the compilation/debugging cycle.

Hope it helps

Can you post your output of dmidecode for the memory section? (dmidecode --type memory)

You might want to read this: http://www.howtoforge.com/dmidecode-finding-out-hardware-details-without-opening-the-computer-case

The "NS" references "nanosecond" the speed in which the memory is able to reply. The lower the number the faster the speed. Unfortunately this doesn't reference an exact Mhz number. DMIDECODE is supposed to output the Mhz as well. Check at the very bottom of the output or simply dmidecode --type memory | grep Mhz

Just to clarify, the 33mhz memory you see at the end is your bios memory :)

    Type: Flash
    Type Detail: Non-Volatile
    Speed: 33 MHz
    Manufacturer: ATMEL

If you want to use a better tool, install lm_sensors (https://wiki.archlinux.org/index.php/Lm_sensors) and i2c-tools (https://www.archlinux.org/packages/?name=i2c-tools)

Then you can get much more details specifics about your memory with dimm-decode (here is a sample of the output):

Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0055
Guessing DIMM is in                             bank 6

---=== SPD EEPROM Information ===---
EEPROM CRC of bytes 0-116                       OK (0x4422)
# of bytes written to SDRAM EEPROM              176
Total number of bytes in EEPROM                 256
Fundamental Memory type                         DDR3 SDRAM
Module Type                                     RDIMM

---=== Memory Characteristics ===---
Fine time base                                  2.500 ps
Medium time base                                0.125 ns
Maximum module speed                            1066MHz (PC3-8533)
Size                                            16384 MB
Banks x Rows x Columns x Bits                   8 x 15 x 11 x 64
Ranks                                           4
SDRAM Device Width                              4 bits
tCL-tRCD-tRP-tRAS                               7-7-7-20
Supported CAS Latencies (tCL)                   8T, 7T, 6T

---=== Timing Parameters ===---
Minimum Write Recovery time (tWR)               15.000 ns
Minimum Row Active to Row Active Delay (tRRD)   7.500 ns
Minimum Active to Auto-Refresh Delay (tRC)      50.625 ns
Minimum Recovery Delay (tRFC)                   160.000 ns
Minimum Write to Read CMD Delay (tWTR)          7.500 ns
Minimum Read to Pre-charge CMD Delay (tRTP)     7.500 ns
Minimum Four Activate Window Delay (tFAW)       37.500 ns

---=== Optional Features ===---
Operable voltages                               1.5V, 1.35V
RZQ/6 supported?                                Yes
RZQ/7 supported?                                Yes
DLL-Off Mode supported?                         Yes
Operating temperature range                     0-95C
Refresh Rate in extended temp range             1X
Auto Self-Refresh?                              No
On-Die Thermal Sensor readout?                  No
Partial Array Self-Refresh?                     No
Thermal Sensor Accuracy                         0
SDRAM Device Type                               0

---=== Physical Characteristics ===---
Module Height (mm)                              30
Module Thickness (mm)                           4 front, 4 back
Module Width (mm)                               133.5
Module Reference Card                           F

---=== Registered DIMM ===---
# DRAM Rows                                     2
# Registers                                     2
Register manufacturer                           IDT
Register device type                            SSTE32882
Register revision                               0x61
Heat spreader characteristics                   00
SSTE32882 RC0/RC1                               00
SSTE32882 RC2/RC3                               50
SSTE32882 RC4/RC5                               50
SSTE32882 RC6/RC7                               00
SSTE32882 RC8/RC9                               00
SSTE32882 RC10/RC11                             00
SSTE32882 RC12/RC13                             00
SSTE32882 RC14/RC15                             00

---=== Manufacturer Data ===---
Module Manufacturer                             Samsung
DRAM Manufacturer                               Samsung
Manufacturing Location Code                     0x02
Manufacturing Date                              2011-W39
Assembly Serial Number                          xxx
Part Number                                     M393B2K70CM0-YF8

If you're really lucky, the tool you're looking for is a flashlight. Some memory you can open the case up and look and see a sticker that has it on the label. Depends entirely on your case though as to how easy it is to get to it, and you don't need to turn off the machine as long as you're really really REALLY careful. I don't know how experienced you are with working on machine internals, but this is the next thing I try when I can't use Linux software commands to figure it out.

EDIT: I have found the ram to be '30 ns' according to dmidecode. How can it be 33 MHz if the board only supports 400, 533, 667 Mhz RAM?

I'm guessing it's something like this:

Each individual chip on a SIMM/DIMM runs at 30ns, or 33MHz. There are 8 chips per SIMM, so 8 x 33MHz = 266MHz; or 16 chips per DIMM, giving 533 MHz.

So while each chip runs at 33 MHz, the whole memory module can deliver data at 533 MHz.

I know this is a bit late, but:

If you take the supported timings, and halve them, they fit with the given rate of 30. Then if you halve this and divide 10000 by it, gives (800, 666, 571.4)

I have no idea why, although I thing the connection between timings and data-rate might be complicated; Also, one of these might be a double data rate.

If possible try running Memtest, IIRC it shows the troughout as well as the memory speed in the top left corner (20000MB/s @ 667MHz for instance).

The timings with DDR sdram are a multiple from 8 AND from 2. From what I remember, DDR means Double Data Rate (please check this, because I could not find the information to check again). That memory is able to transfer both ways (in & out) in the mean time.

The reason is easy. The DDR is timed twice faster than the given bus frequency. Please do not confuse bus frequency and transfer rate capacity for the bus. The bus transfers 32, 64, 128 or 256 bits at the bus frequency. One set of 128 bits of data PER CYCLE is a huge amount of data.

As an example: DDR400 was found on buses @ 200 MHz. The other name is PC3200. To get from 400 to 3200, you will find a factor 8. This factor is ALWAYS verified whatever the DDR (1/2/3/4...)

The following link is good enough to get the basics (and probably better and more complete than my explanations :) )